With no connection to an input, especially one made of high input impedance FETs (all modern processors), just about any signal can bias it a little, partially turning on internal transistors, producing a path through which current can flow. If it’s a GPIO pin, these are by definition bidirectional. Setting the GPIO direction to an output will prevent this unwanted biasing problem, but it will potentially increase standby current a little more than if the pin were an input with a pull-up/pull-down resistor on it.

So what’s the bug? A GPIO pin driving a LED is made an output during normal processor operation. When putting the processor into sleep mode, since there is a pull-up on this pin, the more desirable pulled-up input configuration can be exploited for a little power savings. Just before putting the processor to sleep, this pin is converted to an input; the circuit becomes what is shown in the above sketch. What could go wrong? LEDs have an undocumented feature: run current through them, and they light up; but, shine a bright light on them, and they develop a bias voltage. The transfer of light to current is very poor, so circuit function is barely affected; but in this case, the FET input impedance is so high that the bias voltage can lower the voltage on the GPIO input.

The circuit shown inverts its input, so the bottom transistor is on, and the top one is off. When light hits the LED, the voltage at its cathode drops below VDD, weakly enabling the top transistor, allowing a little current to flow from VDD through both transistors to ground. It’s light sensitive too, which is how it was discovered. This was a little comical, as every time I brought a probe near it, the shade from my own hand would cover the LED, and the current would drop; move away, and it would rise.

]]> f_{sensor} < 100Hz

Owing to this, gain can be set quite high, in some cases approaching open-loop.

In the discrete implementation version, this circuit takes the generalized form:

The choice of MCP6441 is appropriate, as it’s a very low-bandwidth amplifier, perfect for the job. Note however that its open-loop gain begins to drop off at well below 1Hz, so for rapidly varying signals it’s a poor choice.

Where does this get used? The Wheatstone bridge (shown at left) is a standard means of converting a resistive sensor under measurement into a voltage. Many sensors are devices that, by design, change their resistance in relation to the property being measured. Pressure sensors, load cells (also a pressure sensor), resistance temperature devices (RTDs), light sensors (aka photocells), are all examples. One or more of the bridge resistors are replaced with the sensor. Pressure sensors often replace all four resistors with sensing elements to boost sensitivity and repeatability. Usually these devices only change their resistance by tiny amounts, so a great deal of gain is required to make the sensor’s behaviour observable.

How does it work? The amplifier’s performance can be explained without frequency domain analysis, Bode plots, or scope captures. The signals at V_{i+} and V_{i-} are connected to the inputs of op-amps U_{1} and U_{2}; the only current in is what goes into the non-inverting terminals: effectively none. The inputs have very little effect on the measurement sensor, and the very high input impedance terminals can be treated as ideal. The inverting terminals of the two amplifiers can be assumed to match the non-inverting inputs, so V_{i-} and V_{i+} appear on the top and bottom of the gain resistor, R_{g}. The two amplifiers’ outputs (V_{x+} and V_{x-}) feed back through their respective R_{1} resistors, and since there’s no place else to go -the inverting inputs take approximately no current- all current (I_{g}) must flow through R_{g} and both R_{1} resistors. The voltage across R_{g} will therefore always be equal to V_{i}.

The value of R_{g} will in turn dictate how much current flows between the op-amp outputs, which sets the amplitude of two amplifier output pins, and thus the gain! The relationship is upside-down, so a higher R_{g} will result in a lower gain, and vice-versa. Because the two instances of R_{1} are conducting the same current, each will develop an identical voltage, which will appear at the outputs of the two amplifiers on the left. The gain relationship works as follows:

It is fairly standard to set the final amplifier’s (U_{3}) gain to unity, so:

…which is the simplest way of expressing the circuit’s behaviour.

Since the input terminals of U_{3} each have identical resistances (R_{2} in parallel with R_{3}; so says Thevenin), the inputs are perfectly matched (see the input stage posting for an explanation of why this is important). This means the third op-amp will experience no offset. The top instance of R_{3} connects to the output, a virtual ground, the bottom one to physical ground.

In its purest form, the value of R_{g} sets over-all gain, but more can be had by making R_{3} > R_{2}. If the property being measured has a frequency component, there is an advantage to using R_{g} for only some of the gain, and the ratio of R_{3}/R_{2} for the rest. Spreading around the gain reduces the risk of amplifiers hitting their gain bandwidth product limit, allowing the circuit to handle a little higher frequency.

The phrase “perfectly matched” should send prickling sensations up and down the weary designer’s spine; nothing is *ever* perfectly matched. If the resistors used for R_{1} do not match precisely, the voltage developed at the two output terminals will have a gain mismatch error, causing the common mode voltage to be affected by the input amplitude. Resistors used for both R_{2} and R_{3} must also be precisely matched, but since there’s no gain in this stage, the bigger danger is an offset voltage creeping into the output.

So how does one mitigate these risks? The obvious choice is to pick resistors with sub-1% precision and very low temperature coefficients. This is a good start, but a little pricey. An oft’ overlooked possibility is to design with multi-resistor surface mount components. Multi-resistor packages may have a tolerance of 1% or even 5%, but the difference between one resistor and the next within the package itself will be exceptionally small. The variation of all resistors in the package is less critical than the variation of resistors relative to each other, and their respective temperature drift can be tolerated so long as they drift together, also very likely. Conveniently these packages are also physically quite small.

If building with discrete amplifiers, the above considerations should make for a robust design, but there’s an easier way. Since the circuit is so common and popular, it’s available in a variety of integrated packages, such as TI’s INA118:

It looks like a single instrumentation amplifier, but it really is three op-amps in one package with internal precisely matched laser-trimmed resistors; gain is set only by R_{g}.

The reference pin should be, in a dual-supply configuration, connected to ground. Its impedance should roughly match the virtual impedance of the unity-gain amplifier, so if there’s a 50Ω source impedance, connect a 50Ω resistor to ground, unless the datasheet says otherwise. This may not yield a measurable improvement in performance. So why not just call it ground if that’s its purpose?

In a single-supply circuit, such that V_{DD} is say +5V and V_{SS} is ground; hooking the REF pin to ground is like hooking the non-inverting impedance path to the negative supply rail rather than what the op-amp treats as ground. Ideally something that looks like V_{DD}/2 is what is required.

Do not just use a voltage divider from V_{DD} to ground. Although the V_{DD}/2 voltage is a close match to virtual ground, its impedance is ½ that of the two resistors used to split the voltage; it needs to be a low-impedance path to work properly, otherwise the amplifier can pick up noise, and there’s that offset problem. One approach is to use an amplifier configured for unity gain with a voltage divider on its non-inverting input. The output will match V_{DD}/2 but will have the same impedance to ground; this makes using a quad-amplifier IC for a discrete implementation a great solution.

Note that in the case of the INA118, the manufacturer recommends grounding the pin even in single-supply systems, and further recommends that no source impedance, like the 50Ω mentioned above, be used.

There is yet another danger with instrumentation amplifiers. The common-mode voltage (or average) on the inputs, (V_{i+} + V_{i-})/2 is an important number. If running with dual supplies, inputs should be centred about 0; if single supply, they should be centred at roughly mid span, however some experimenting should be done to guarantee performance. Why does this matter? Gain is extremely high on the input stages, and V_{x+} and V_{x-} will be centred about the common mode input voltage. Suppose, in a single-supply system with V_{DD}=5V, the inputs have a common mode voltage of 1.0V; the amplifier will attempt to drive V_{x+} or V_{x-} below the negative supply rail, but it cannot and will instead merely approach 0V. The output voltage will not accurately represent the input.

The above discussion pertains to the discrete implementation. If working with an integrated instrumentation amplifier, check the common mode range! Below is a graph appropriated from TI’s INA118 datasheet illustrating the problem:

The above plot applies to a single supply configuration with V_{DD}=5V and various possible gain settings. If the common mode voltage at the inputs is 1V, the amplifier will not produce ANY output. The best case scenario is to have the common mode voltage somewhere above mid-span, the idea being to allow the output voltage to climb as high as possible, and hence maximize useable range. If gain is set to two or more, it is best if:

3.0V < V_{CommonMode} < 3.5V

This is not obvious without looking at the graph, and in fairness the part is much more tolerant of common mode variations in dual-supply mode.

Wrapping up, a designer should be able to put together a sensor amplifier with ease based on the above discussion. One is easily built from scratch, or can be had completely integrated. The issue with common mode voltages is worth noting too.

- INA118 Precision, Low Power INSTRUMENTATION AMPLIFIER, SBOS027, Texas Instruments.

Recalling the analysis of why non-inverting configured amplifiers cannot attenuate beyond 0dB, implying they’re useless as filters was a deliberate oversimplification. There is a more elegant way of configuring these, creating excellent two-pole filters. The Sallen-Key topology, named for its inventors, offers a slick way of getting sharper pass/stop bands while minimizing component count. Passive components can be arranged for low pass or high pass.

Since this configuration is less transparent (pun accidental) it gets less use in practice. On first encountering one, designers may find it non-trivial to dissect and analyse; but remember, they don’t name a design after you unless it’s a significant achievement. We won’t go through every possibility, but we will look at the general topology and a low-pass configuration.

Here’s the generalized concept in schematic form:

First, what’s up with no resistors or capacitors? Depending on what behaviour is desired, the generalized impedance blocks, Z_{n}, could be resistive or reactive. See the positive feedback loop? At first glance, seems like this shouldn’t do anything useful, but not so. There is also a negative feedback loop which will stabilize the amplifier. The reason we talked about a non-inverting configuration in the introduction is because in many cases, Z_{5} is 0Ω, and Z_{6} absent, creating a unity gain follower.

A general analysis of the impedance and voltages follows. A few corner-cutting assumptions can be made, most importantly, the op-amp will be taken as ideal over the frequency of interest; this keeps the arithmetic to a practical level:

What’s really required is a gain equation in a simple enough form to allow us to see how different impedances affect behaviour. Applying Kirchhoff’s Current Law (KCL) to the V_{x} node:

Applying KCL to the V_{+} node and substituting into the above gives:

Recalling the relationship between V_{+} and V_{o}:

Now we have an equation relating V_{i} to V_{o}; simplifying by multiplying through all terms, consolidating, cancelling etc…

A little attention to detail is required to get to this point, and many intermediate steps have been skipped; it’s a worth-while exercise to work the problem through by hand. More importantly it is difficult to look at the above equation and see how to make it into a filter, or how stable it is.

One subtle insight is that since each term is a triplet of impedances, reactive components can combine into values that vary by the square or cube of frequency. Does this make a 3^{rd} order filter a possibility? Looking closely at the above gain equation, all terms have either Z_{5} or Z_{6}, and only Z_{1} and Z_{2} are missing from the numerator. This rules out a 3^{rd} order filter, but not a 2^{nd}.

Now that we have a generalized gain function, focus may shift to the desired behaviour. Since every impedance has been carried through from start to finish, it gets simpler from here as most changes involve either deletions or substitutions of single components. This can be modified to produce a high pass filter too, but rather than analyse every possibility, we’ll limit the discussion to low-pass.

Before going too nuts with the low-pass behaviour, we’ll limit the amplifier gain by assuming a unity gain follower in the negative feedback path; this translates to Z_{5} = 0 and Z_{6} = ∞. With Z_{5} = 0, the numerator and denominator each lose a term and all remaining terms include Z_{6}, so they cancel out:

Still a little unruly, but getting easier to follow, and clearly this cannot be a 3^{rd} order filter. To make a low-pass filter out of this topology, we need to nail down which components are real vs. which are reactive.

An additional piece of information is very helpful: a generalized equation for a low-pass filter. If we know what it’s supposed to look like, values can be chosen to turn the generalized gain equation into what we need:

Where f_{c} is the filter’s corner frequency, G is the gain of the amplifier and Q is the quality factor of the filter; in this case gain is 1, and Q is of special interest. Too high, the amplifier will tend to ring and behave a little unstable (under-damped) around its corner frequency; too low and it will roll off too soon (over-damped) and we’ve lost some of the value in having a 2^{nd} order filter. Goldilocks had the right idea: strive to make it just right (critically damped). The term cut-off frequency used until now makes sense with a single pole filter, but loses its meaning of 3dB attenuation in higher order filters. Critical damping occurs when Q = 1/√2, or ~0.707. This corresponds to a maximally flat Butterworth filter.

To that end, a little tinkering and the six passives become R_{1}, R_{2}, C_{3}, C_{4}, R_{5}, R_{6}. The last two are set: R_{5} = 0Ω and R_{6} = ∞Ω; they can be ignored as described above.

Stripping R_{5} and R_{6}:

This matches the form of the generalized 2^{nd} order low-pass filter function. We can now relate the corner frequency to the four remaining unknowns:

That’s great, but four unknowns and only one equation is not quite enough. Getting back to Q:

How about that? Q does not depend on C_{4}! OK, it does in the sense that Q depends on the corner frequency, which does depend on C_{4}; however, the corner frequency is the top priority in the design hierarchy, and R_{1}, R_{2}, and C_{3} are selected on this basis. It’s more like both Q and C_{4} depend on f_{c}. This gives a little bit of freedom, allowing f_{c} to be fixed while Q is varied; we can choose the damping we want and adjust C_{4} to keep f_{c} where we want it. Arbitrarily, let’s make f_{c}=100KHz, and Q=1.0.

How about input impedance? The filter will present an impedance load to whatever signal is driving it, and we’d like that load to be light enough that we don’t lose energy in the driving source’s internal impedance, yet heavy enough that we don’t pick up noise. A quick look at the filter circuit reveals the load presented to a source is very complicated. Rather than work the equations over before making decisions, another arbitrary decision can be to make the two resistors equal, 10KΩ each. This should present enough load to any driving source to avoid unnecessary noise, and be high enough to swamp the driving source’s internal impedance.

Critical damping is a good design practice, but less interesting when experimenting. Deciding Q should be at least 1, C_{3} works out to ~80pF. Higher capacitance increases damping and reduces ringing; for this exercise we’ll skew towards under-damping; 82pF is commercially available, so go with that.

Getting back to f_{c}, and now just plugging values into the corner frequency equation, C_{4} comes out to 309pF. We can’t buy that either, but we can buy 330pF, at the additional cost of moving the corner frequency.

With necessary compromises made, f_{c} = ~96.75KHz, and Q = ~1.003, under-damped. At Q = ½, the filter should behave exactly as two cascaded low-pass filters; no ringing. At Q = 0.707, the filter behaves as a Butterworth maximally flat filter; also no ringing. At higher Q, the filter will ring, and even the theoretical plot of amplitude shows this. Note the increase in gain right near f_{c}:

Half the fun is seeing if the the theory matches the behaviour. Sticking with the LF353 used for most of these tests, here is the basic set-up:

- Amplifier: LF353N
- Gain: Unity in the pass band, except near the corner frequency.
- Supply voltage: ±15V
- Input: sine wave, 7.0Vpp, logarithmic sweep from 1Hz to 1MHz, 120mS per sweep
- Horizontal axis: 10mS/major division, each 2 divisions is a decade increase in frequency
- Vertical axis: 2V/major division for the input (red); 1V/major division for the output (blue)
- Sync: External sync pulse from signal generator

Below is a scope capture showing the filter’s performance:

Note the phase at lower frequencies is 0°, as predicted by the analysis. The input waveform is shown at 2V/division in order to make the phase angle visible (otherwise they lay exactly on top of each other until the corner frequency is approached). Examining phase at around the corner frequency, though not visible above, it is approximately 90° lagging, and continues increasing towards 180° as frequency enters the stop-band.

Above is the output waveform scaled up to 0.5V/division and offset by -2V, in the fine tradition of Bode plots that aren’t really Bode plots. Note also that as phase approaches 180° the amplifier won’t oscillate due to the gain being significantly below 0dB. Instability increases with Q, however as it lowers the damping.

The Sallen-Key filter is a versatile concept, and though it garners attention among academics, we stumble upon them only rarely. If a high-pass filter is desired, Z_{1} and Z_{2} become capacitors, Z_{3} and Z_{4} resistors. After that, working through the math is very similar to the above exercise.

Next up, some amplifier topologies are so useful that their designs get swept wholesale into ICs; we’ll take a look at an instrumentation amplifier.

]]>This one’s the easier of the two because it’s a combination of the low and high-pass filters already encountered: the high-pass is the R_{1}|C_{1} combination, the low-pass the R_{2}|C_{2} combination. Schematically, it looks as follows:

Sticking with frequency domain analysis, the math breaks down like so:

This looks a little messy, and some algebraic manipulation easily turns this into a manageable equation. Although there is a temptation to process this to a set of real/imaginary or in-phase/quadrature components, it’s much easier to take an absolute value by multiplying the complex terms through by their conjugates and square-rooting the results in place. This means the above equation, messy though it is, is almost as far as we need go.

Determining phase angle by brute force also requires converting the above gain to in-phase and quadrature terms. Instead, since these two impedances are being divided, the phase angle of the overall gain is equivalent to the difference in angles between the numerator and the denominator; a much easier calculation.

Reducing the numerator and denominator to simple in-phase and quadrature components is much less trouble than working it out for the whole term, and more valuable. The equation is simple enough to provide some insight into what the amplifier is doing, the thing we wanted in the first place.

Armed with all of this information, picking values to highlight the behaviour:

Checking high and low pass 3dB points, we have a filter with a pass-band suitable for illustrating the intended functionality:

It looks good according to the plot, but what does it really do? Below is a frequency sweep -input in red, output in blue- showing the behaviour from 10Hz to 10MHz (logarithmic sweep); the same range as the above theoretical plot. The output curve is inverted to show the phase relationship. Note the output amplitude leads by about 90° at low frequencies:

To get the above to look a little more like the calculated plot, the input waveform is turned off, scale of output doubled and shifted to the bottom of the display; still linear on the vertical axis but the behaviour is pretty clear, and a match to the calculation.

Horizontally, every two major divisions is a decade increase in frequency; vertically every division is ½Volt.

This is a very simple band-pass filter, as it is only using one impedance pole for each of high and low-pass.

Here things get a little more complicated. Where band pass filters can be thought of as two blocks in series, band stop filters can be thought of as two blocks in parallel; one passes frequencies below the bottom of the stop band, the other those above the top of the stop band. The reason for the series/parallel analogy is that this cannot be done in series. If the low-pass filter came first, there would be nothing left to feed into the high-pass, and vice-versa. The two filters are inserted before the feedback loop of the amplifier. Multiple inputs can be merged this way, enabling development of much more complex filters.

The math for this configuration is potentially quite ugly. Performing circuit analysis a la brute force to reduce the terms to real and imaginary components is beyond any value that such an exercise may offer. Instead, treat each piece separately: the R_{1}|C_{1}|R_{2} terms form a recognizable high-pass filter, the R_{3}|R_{4}|C_{2}|R_{2} terms a low-pass filter. Choosing components such that the high-pass filter passes frequencies in the stop-band of the low-pass filter creates a range of frequencies that will not pass through the network. The math works as follows:

If other stop-bands/notches are desired, these components can simply be ganged up, as each new input path provides an additive term. Care must be taken to avoid multiple pass bands, however.

As with the band pass filter, it’s much more convenient to leave each gain term alone and observe their behaviour individually.

Choosing components for an illustrative notch in filtering:

This all works out nicely, and can be plotted. The rather wide stop band is strictly for making the concept visible in a gain/phase plot over frequency:

Note that the above is a bit of a cheat. The equation for the low-pass term is plotted only until the gain drops to less than that of the high-pass term, which is plotted only until the open-loop gain curve of the amplifier is reached. Rather than combining the phase for all terms, each is shown separately. Note that even though there is a -90° shift in the stop band of the high-pass filter, the gain is so small that it doesn’t affect the phase of the system; only the low-pass filter’s phase is apparent. Looking only at the two impedance terms above makes clear that phase shift is close to 0° at low frequencies.

The scope capture above shows the filter in action with a logarithmic frequency sweep from 10Hz to 10MHz; amplitude is beginning to attenuate due to the gain-bandwidth of the amplifier somewhere in the 200KHz vicinity. Picking various frequencies of input shows that the phase behaviour is as expected, lagging as the stop band is approached, and bouncing back to 0° once in the high-pass filter’s range. Not shown is that as the amplifier itself begins to limit, the phase angle begins again to lag.

As previously, examining the output only, doubling its amplitude and offsetting 0V to the bottom of the display gives a plot vaguely resembling the above gain/phase plot.

One of the problems apparent in the above circuits is that the frequency does not just stop/start passing through the amplifier at the design frequencies; there is a rolling on and off of amplitude. More filter poles and different amplifier configurations can help tighten up the transitions between passing and stopping. Next up, increased poles with a Sallen-Key filter.

]]>High-pass filters are encountered a little less frequently than the basic first-order low-pass, but they do have utility; for instance, blocking DC and filtering out AC line noise in audio circuits. We’ll stick to the inverting mode in this case.

Continuing as previously with frequency-domain analysis, as it makes the math algebraic; don’t be scared, no differential equations will be introduced, yet. The gain equation breaks down as follows:

Converting to a magnitude with an angle, and leaving the magnitude negative since it is inverting:

As before, we need to choose f_{c}, and select some values. Since this is just a straight up exercise, we’ll pick values first, and see where we end up. We are cheating because we’re using much the same values as the previous post used for low-pass:

So on a Bode plot, we find the amplitude and phase behave exactly as calculated; note the apparent low-pass characteristic at the high end is due to the amplifier’s open-loop gain curve.

Similar to the low-pass filter analysis, we’ve set the this up as follows:

- Amplifier: LF353N
- Gain: 2:1, f
_{c}≅ 6640Hz - Supply voltage: ±15V
- Input: sine wave, 7.5Vpp, logarithmic sweep from 10Hz to 10MHz, 120mS per sweep
- Horizontal axis: 10mS/major division, each 2 divisions is a decade increase in frequency
- Vertical axis: 1V/major division
- note this is linear, not logarithmic; the axis is different from the above plot

- Sync: External sync pulse from signal generator
- Persistence: none; the shape fills in nicely anyway.

The red curve above is the input; blue is output. This shows full signal, and a close look reveals the output sinusoid is indeed leading the input as frequency increases. Sliding that down to the bottom of the display, we get something not completely unlike a Bode plot, if the linear vertical axis can be excused.

We really shouldn’t rely on the open-loop gain curve to limit the top-end performance, so we’ll address that next post; mean time, as promised, a few words about capacitors.

Capacitors are the heart of most filters, so understanding why one type is better than another is important.

The above configuration can be a little tough on the filter capacitor if the signal source has extraordinarily low impedance. Capacitors in reality are not ideal. While they theoretically have no resistance or inductance, in reality they do. This means the capacitor itself will dissipate some power, but even if it were ideal, a high-current signal source will be heavily taxed by what is effectively a dead-short for some frequencies.

Capacitors use different dielectric materials depending on the amount of capacitance, voltage rating, and intended use. Though there are many types, we’ll limit the exploration to what’s useful in filter capacitors.

For smaller, closer to ideal capacitors, ceramic capacitors are widely available, however there are myriad types, each with unique features and benefits. It’s also a highly competitive and evolving market; new types are appearing all the time. Dielectrics are usually specified by a three digit code: NP0, X5R, X7R, Y5V, Z5U; all are readily available. What to choose? Usually these codes have to do with stability.

The letters, of course, all mean something. There are two major classes: Class 1, and Class 2; crazy complicated. Ultimately, we want a class 1 capacitor wherever we can get one, but we’ll go over class 2 first and why it’s a second-place choice.

In class 2 dielectrics, the first letter, X,Y,Z, translates to the minimum operating temperature: -55°C, -30°C,+10°C. Applications that will operate below 10°, therefore, should not use capacitors with a Z in their first letter. The second digit is the high temperature; higher numbers mean higher temperatures: 5 & 7 translate to +85°C & +125°C respectively. The final digit is the typical tolerance over temperature range: R = ±15%, U = +22/-56%, V = +22/-82%; so choose R if a class 2 dielectric is being used in a filter. This means Z5U and Y5V, though they offer amazing capacitance per unit volume, are not good choices. Really, class 2 is chosen only when there’s an overriding factor, like insufficient space, or a tight budget.

One additional “feature” of X, Y, and Z series capacitors is they are subject to piezoelectric coupling. This means mechanical vibrations can be turned into electrical signals by the capacitor, and coupled into the circuit. In an audio circuit this can be a frustrating source of noise. For this reason, these dielectrics should be avoided for filters.

Class 1 capacitors constructed width NP0 dielectric are a better choice for two reasons: they have the most stable temperature coefficient, typically 0±30ppm/°C; and, they have no piezoelectric sensitivity. This should be a first choice, unless that little bit of extra performance is needed; in which case, film capacitors may have a slight edge.

Film capacitors are a class on their own. There are several different types, polyester, polypropylene, polycarbonate… basically they’re all poly-somethings, plastics of different types. Of them, polypropylene offers a very stable, high Q factor capacitor which is excellent for filters and resonant circuits. They are a little bulky, so can only be used where space is available. They are available in surface mount, but they can be a little tough to work with as they’re made of plastic, and will encounter a soldering iron, or reflow oven. If you have to solder these by hand, sharpen your skills, and be quick with the iron.

Wrapping up, for a first order filter, the math builds on previous analysis, and the behaviour matches the mathematical model quite nicely. A brief review of the types of capacitors best suited to filters shows film is best if space permits, with a close second place to NP0 dielectric ceramics. Next time, band-pass and band-stop filters.

]]>The idea with all filters is that there are pass bands and stop bands, each band being a range of frequency; that said, most filters only have one of each.

Low pass filters are the most common and easy to understand. These have a pass-band starting usually at DC (0Hz) or something close to it. The point at which the pass band ends is typically noted as the point at which the signal’s amplitude has been attenuated by about 71%, normally called the cut-off frequency, f_{c}. To make a simple filter out of an op-amp circuit, the impedance in the feedback loop is generally modified such that it begins to shrink as frequency rises. A capacitor in parallel with the feedback resistor is the easiest way to pull this off:

Since we went through the circuit analysis a few posts back, we’ll cut to the chase here; the impedance in the feedback loop is now:

A little compressed, but it reduces the impedance to a magnitude with an angle. Gain in the inverting case is, compared with the non-inverting case, the simpler version:

Low-pass cut-off frequency (for a single pole filter like this one) is determined as the point at which the in-phase (real) and quadrature (imaginary) magnitudes are equal. Below is the same equation arranged to determine whatever is required.

All that’s needed now is to choose the desired f_{c} and pick some sensible values, so let’s say f_{c} = 3.3KHz. Arbitrarily setting R_{1} = R_{2} = 10KΩ, C works out to about 4823pF; not a standard value, so something’s gotta give. We don’t need exactly 3.3KHz, and we can buy 4700pF off the shelf. This moves f_{c} to 3.386KHz, pretty close to the objective and easily assembled.

Above is a plot showing three different parameters. The blue line is our unity gain curve, showing the attenuation well underway at a phase angle of -45° (red line); looks much like just above 3KHz. The dotted line in the upper right quadrant is the amplifier’s open-loop gain, the upper bound of all behaviour. Everything the op-amp does must be to the left and below that line.

What about that non-inverting configuration? Several postings back, it was claimed that it doesn’t make for the best filter because it can’t attenuate beyond unity. If the non-inverting amplifier has gain, any noise can be reduced by a filter construct similar to above, but only to unity. Below is a side-by-side comparison of an inverting configuration and a non-inverting one.

In the interest of making it a fair fight, both amplifiers will be configured for a 2:1, or 6dB gain. Note the extra resistor, R_{5} in the non-inverting circuit. This is mainly present to give the non-inverting input its needed bias current and minimize offset voltage. To make it work, keep the following relationships:

Sticking with 10KΩ for resistors:

The filter behaviours should intuitively -one might think- be the same, but no:

The blue curve is the inverting case and looks a lot like the first plot; but, the green curve shows the attenuation never reaching 0dB, and eventually hitting the constraint of the open-loop gain curve. Interestingly, the phase behaviour for both configurations is the same.

Below are two scope captures with the following configuration:

- Amplifier: LF353N
- Gain: 2:1 for both inverting and non-inverting amplifiers, f
_{c}= 3386Hz - Supply voltage: ±15V
- Input: sine wave, 7.5Vpp, logarithmic sweep from 1Hz to 1MHz, 120mS per sweep
- Horizontal axis: 10mS/major division, each 2 divisions is a decade increase in frequency
- Vertical axis: 1V/major division, 0V is the bottom edge of the display so only the positive half of the signal is visible.
- note this is linear, not logarithmic; the axis is different from the above plots

- Sync: External sync pulse from signal generator
- Persistence: infinite, and allowed to run for 10-15 seconds to fill-in the overall shape

Above shows the behaviour of the inverting configuration. The filter is stripping away pretty much everything above the 3.39KHz mark, as expected.

Above shows the behaviour of the non-inverting configuration. Note the waveform does not attenuate to zero; also as expected, and not as useful. A decent scope will have the ability to show just the envelope in the persistent mode, but in this case it’s a little more informative to leave the waveforms visible; it makes clear how this envelope is being produced.

If a non-inverting configuration with low-pass filter is unavoidable, it may be* tempting* to move the reactive component to the non-inverting pin. The capacitance will need to be doubled, as the resistance is halved. This ends up looking like so:

What happened? 45° phase shift and 3dB of attenuation does not occur until just north of 200KHz. We’ve overlooked something; f_{c} is much higher than expected.

The source driving the signal is modelled as an ideal source with a series resistance, usually 50Ω. Because voltage sources have -impedance-wise- no resistance (see Norton’s theorem), the 50Ω source impedance is in parallel with R_{5} and C_{2}! This will push the cut-off frequency way up. Instead, double R_{5}, and put it in series with a second resistor of equal value; put the capacitor to ground between them, like so:

This works, but at a price. The two series resistors become a voltage divider for the original signal, so R_{4} must be trebled to compensate. With a 2:1 gain now a 4:1 gain, there’s a little more noise to contend with, and the gain bandwidth curve for the amplifier must be checked to ensure it does not interfere with performance; it doesn’t in this case:

In short, the non-inverting configuration is fussy, requiring adjustment of many parameters, more components, increased gain, and will have more noise; the inverting configuration in contrast is easier on the op-amp, has fewer components and less noise. Resistors are noise-makers, as mentioned a few posts back. Really though, the non-inverting amplifier isn’t a filter at all! It’s just providing gain after a passive low-pass filter.

So our first filter works, and we know a non-inverting configuration is a second choice. Next time, high-pass filters, and a brief discussion of how to choose the right capacitor for the job.

]]>The previous example is a good theoretical illustration of intentionally causing oscillations, but it’s a little impractical to build. Repeating the inductance equation here:

If the feedback resistors are 10KΩ, L turns out to be nearly 16H! A Henry (unit of measure for inductance) is really big; most PCB-mountable inductors are in the micro- or nano-Henries. Even an inductor in the milli-Henries is physically unwieldy.

Reducing the resistors to 1KΩ will bring inductance down to ~1.6H, but that’s still quite large. Increasing the frequency to 10KHz would help a lot, but we’re still looking at ~1.6mH, and the MCP6441 is not made for this; the frequency is already greater than the gain-bandwidth product (9KHz), so it won’t work.

With a higher-bandwidth amplifier, these values become a little more obtainable and can be dropped onto a breadboard for testing. For example, if we move to an LF353, with a GBP of 4MHz, we find first of all that the three manufacturers who make this product either do not include plots, or their plots have peculiar labelling, and in short, look wrong. Here’s how it breaks down: TI has two products, and LF353 and an LF353MX. The data sheet for the vanilla LF353 does not include any plots. The datasheet for the LF353MX on the other hand, does. Here’s ST’s (left) and TI’s (right) view of the gain & phase vs. frequency:

The following is more editorial than should be allowed; sort of a stream-of-consciousness of datasheet interpretation…

- These diagrams have never been updated, and look to be copied from their decades-old datasheets; not that this makes them wrong, but a more accurate representation of behaviour is easily produced at this time. They are wrong for other reasons.
- Both show open-loop performance with a 2KΩ, 100pF load, though ST for some reason feels an ambient temperature of 125°C is the most likely one for which operating parameters are required.
- ST indicates the Y axis of their plot is Differential Voltage Amplification (V/V) which we must assume is V
_{o}/ΔV and is really a ratio of V:mV as the typical large-signal gain is -from their parameter table- 200,000:1, not 100:1. This is further confused by their large signal gain curve showing it’s 200:1 at around 25°C, and 60:1 at 125°C…but the above curve shows it’s around 100:1 at 125°C…huh? This is obviously wrong. If that weren’t confusing enough, a gain of 100 should really be 100,000:1, which when converted, turns out to be 100dB! This implies the curve really already has a log scale, but then 0dB is not on the plot, which is an absolute requirement, so that can’t be right. Looking at the fragment provided in TI’s datasheet, their 0dB line corresponds -approximately- to the line on the ST datasheet marked with a 1, but we don’t know the temperature to which TI’s datasheet corresponds. If 1 really is 0dB, then 10 must be 20dB, and 100 must be 40dB…huh? That can’t be right either. If 100 corresponds to 100dB, and 10 corresponds to 10dB…no that doesn’t work either. This plot is terrible! What should it look like? If the figure showing the gain is 60:1 at 125°C, which we must interpret as 60,000:1 because it’s mislabelled too, the gain comes out at ~96dB. You just have to try it on a breadboard. - Whereas TI’s diagram includes only a small portion of ST’s, showing only the gain rolling off between 100KHz and 30MHz, ST’s covers 100Hz to 10MHz. In fairness, TI provides a separate chart of open-loop frequency response, but does not include phase, and the curve shows 110dB up to 10Hz, whereas ST’s above shows ~100dB up to 30KHz. One must ask, are these the same part?
- ST’s diagram indicates that frequencies below 10KHz, phase shift is 180°, so this amplifier will oscillate no matter what; but, it does not. TI’s fragment shows phase heading north to 180°, but since the destination isn’t shown, we can’t say.
- ST indicates 90° phase shift at about 300KHz; TI indicates 90° phase shift at about 600KHz.
- ST indicates 0° at ~6MHz; TI indicates 0° at ~10MHz.

After a little testing, the amplifier’s large signal behaviour looks much more like this:

Note the phase bears only a passing resemblance to the data-sheet. Don’t believe it? Try it with a real device:

- The red curve is ΔV; the blue curve V
_{o}. - The supply voltage to the amplifier is ±15V.
- The amplifier is in an open-loop configuration; no feedback.

The phase shown on the ST data sheet should be close to 160°, but V_{o} is clearly lagging by 90°, so the angle would be -90°. Note also the input and output peak-peak voltages. Working this through shows only 50dB of open-loop gain at 10KHz; not quite what the manufacturer says, but interestingly spot-on in TI’s datasheet (Open Loop Frequency Response figure).

Closing the feedback loop with unity gain, we should be able to see the phase error increase as we approach the unity gain bandwidth frequency:

Note the amplitude here is much much lower. Since its configured for unity gain, the input amplitude is actually 7V_{pp}. More importantly, the phase lag from ΔV to V_{o} is sitting pretty close to 135° at 5.5MHz input.

That aside, the amplifier was configured as in the last post, but included the test load specified in the manufacturer’s datasheet (2KΩ in parallel with 100pF):

With 10KΩ resistors in positions R_{1} and R_{2}; the inductor chosen was 1000μH. This did not produce the oscillations expected. It turns out the amplifier is quite able to deal with the inductance in its feedback path. After some careful checking, it turns out a much lower feedback resistance, R_{2}, is needed: 620Ω does nicely. Below is the impedance over frequency, including phase:

As previously discussed, the positive phase actually pushes the amplifier towards 180°. Here is what the final gain/phase curve looked like:

Note the gain is increasing with frequency as we approach the unity gain curve, resulting in a rate of closure of 40dB/decade, which just happens to coincide with the phase reaching -180° where the curves meet. Applying power to this results in some very strange looking waveforms:

There is no input connected to this, so the amplifier is doing its own thing here. Note that the red trace is what’s on the inverting input; so much for ΔV = 0 at all times! Oscillating at ~355KHz, it’s probably affected by a bit of stray capacitance in the breadboard and the components around it, but those are a little tough to measure accurately. So why does it look like an ugly triangle-wave, and why is the phase angle not 180°?

Previously, in the discussion of decompensated amplifiers, slew rate was touched on: the maximum rate at which the output can change. The LF353’s is between 12 and 16V/µS, meaning that’s how much its output can swing per microsecond. This can be roughly measured from the above scope capture by inverting the oscillation frequency, halving it, and dividing that into the peak-to-peak swing voltage:

It’s nearly exactly where it’s expected to be.

As to phase, the capture shows -83.76°, but this is actually bouncing around quite a bit; it’s unstable! The amplifier is unable to cope with the signal it’s feeding back on itself. Slew rate limiting is actually masking the phase error inside the amplifier, which is very clearly sitting somewhere near 180°. It wouldn’t oscillate otherwise.

Introducing extra phase delay to the feedback path is really the hard way of doing it; it would be much easier to use positive feedback -connecting the output to the non-inverting input- as the 180° phase shift is accomplished without reactive components, though it won’t oscillate without some additional coaxing.

Next time, we get to the basics of filtering.

- STMicroelectronics – LF253, LF353 – Doc ID 2153 Rev 3 – March 2010 – Figure 10
- Texas Instruments Inc. – LF353 Wide Bandwidth Dual JFET Input Operational Amplifier – SNOSBH3D – May 2004 – Figure 13
- Microchip Technology Inc. – MCP6441/2/4, 450nA 9KHz Op Amp – DS22257C – 2012 – ISBN 978-1-62076-244-8

We learn more when things go wrong, and an unstable amplifier could be classed as having gone wrong. Instead of waiting like lambs for the (ahem) learning experience to find us, why not intentionally break an amplifier?

Why does a 180° lag where the gain is well below 0dB matter? In the cases presented so far, it doesn’t. When using amplifiers for filtering signals, reactive components (i.e. inductors or capacitors) are added to the circuit; in that case, it might. How about a series inductor in the feedback loop?

Putting an inductor in the feedback loop is unusual. In this case it’s an exercise and would not normally be done; the point here is to see if the amplifier can be deliberately made to oscillate. Renaming R_{2} to the more generalized Z_{feedback}, and carefully choosing an inductance to illustrate the point:

With a series inductor L:

Where f is frequency in Hz, and j is an imaginary number (yes it’s normally denoted with an i but i already represents current, so j it is).

Getting back to that careful choice of inductance:

This choice makes the quadrature (reactive) component of impedance equivalent to the in-phase (resistive / non-reactive) component at 100Hz, the reason for which should be come clearer as we go:

Simplifying:

What does this do to gain? Well, this:

Gain is recognizable as the previous inverting configuration, but now has an extra frequency-dependent term. It should be obvious that above 100Hz the impedance is mostly reactive; less than 100Hz, mostly resistive. Note also that gain increases unbounded with frequency…until the Gain Bandwidth limit is reached.

To illustrate the point, some plots showing behaviour of gain and phase should help:

Above is a reboot of the previously shown MCP6441 gain/phase plot, however in this case the effect of the extra pole on gain is visible. Note that for frequencies greater than at unity gain (0dB / ~10KHz) the gain begins to roll off at 40dB/decade rather than 20.

The phase of the amplifier as shown above is -90°. This means the voltage at V_{o} is lagging 90° behind the voltage between the non-inverting & inverting pins, or ΔV. For instability to occur, we’d need to affect the phase difference only from V_{o} to ΔV.

Below is the closed loop feedback gain and phase based on the equations discussed above.The phase angle is crosses 45° at 100Hz, just as expected:

Note that as the reactive component’s impedance increases, it begins to push the phase in a positive direction relative to V_{i}. As the inductance begins to dominate the impedance, and hence add its 90° of phase shift back into the mix, doesn’t this make the amplifier more stable? V_{o} is now, in theory at least, in phase with the inputs, right? Not exactly.

Since the positive input (pin 3) is grounded, and we’re concerned with the difference in phase between ΔV (V_{pin3} – V_{pin4}) and V_{o}, this means the difference is well, upside-down. So, that 90° that the inductor begins to contribute, is actually pushing the phase difference towards instability. This is bad, which is good, since we’re trying to push it over the edge.

Because this is unstable feedback, any noise with a frequency component near the point of resonance will be amplified and fed back into the inputs, getting bigger with each cycle. This will be limited by the supply voltage in the end, but it should be clear this circuit will produce oscillations with no regard for what’s happening at V_{i}.

The figure above shows gain with the boundary of open-loop gain and the phase of the amplifier itself taken into account. Note that the phase is settling in at around 90° in 0.1-10Hz range, but then begins to shift extremely rapidly as both the 2nd pole in the amplifier and the zero from the inductor contribute. This is a nearly perfect storm. Because the impedance in the feedback loop is increasing as the 180° phase boundary is approached, the maximum amount of gain is being applied at the most unstable point. Any gain greater than 0dB where phase is 180° will oscillate.

Peripherally related to closed loop control and stability are the control-system concept of Rate of Closure, and the not-so-common Decompensated Op-Amp.

There’s a slightly less subtle hint of instability. The gain curve can be seen to increase from 0dB/decade to 20dB/decade as frequency rises above about 10Hz; the open-loop gain curve is decreasing at 20dB/decade in the same frequency range. The slope at which the closed loop gain curve intersects the open loop gain curve is called the rate of closure, and for stability must be no greater than 20dB/decade. In this case, it’s roughly: 20dB/decade – -20dB/decade = ~40dB/decade. This is bad, which in this case is good…you get the idea.

Way earlier in this post, it was noted that the extra pole might be of some significance. If the amplifier is running at unity gain, and the closed loop gain curve hits the open loop curve at a point where the amplifier is beginning to decrease gain at a rate higher than 20dB/decade, say a slope of -23dB/decade for example, the amplifier can actually go unstable. This is why a little care is required when using a unity-gain configured amplifier. This configuration has marginal stability at frequencies around the gain-bandwidth product.

Some amplifiers are actually not “unity gain stable”, meaning if their output is fed back to their inverting terminal with no gain setting resistors in place, they will oscillate. Why on earth would anybody want that?

There are other properties of amplifiers that limit performance. One parameter that goes hand-in-hand with bandwidth is slew-rate. Slew rate is the maximum rate of change of the amplifier’s output. The higher the slew-rate, the faster the amplifier. This makes sense, and ties back into the unity-gain bandwidth problem. More gain means less bandwidth because the amplifier must swing much faster to replicate a higher amplitude signal. If the peak-to-peak voltage is higher, the slope of the voltage curve will be much steeper, and might bump into that testy slew-rate. So, a high slew rate is often a desirable thing.

Op-amps are almost always “compensated.” That means they have those internal poles to keep the amplifier gain less than unity when phase margin approaches 0°. The penalty for this is reduced slew rate, and more current required to push the amplifier’s performance when hampered by these internal poles.

Some amplifiers are “decompensated.” This means they lack those poles and as a result, at unity gain, are not stable. Slew rate is however, much higher, current consumption lower, and cost usually unaffected. These are desirable things. The price is there is a minimum amount of gain at which the amplifier can reliably operate. Working with decompensated amplifiers is hence, a more advanced topic.

So we have a design that should oscillate and behave a little unpredictably, but the value required for inductance is impractically large. We have also scratched the surface on Rate of Closure and Decompensated Amplifiers.

Next time around, we’ll try making this work with a higher-bandwidth amplifier (an LF353) and readily available passive components.

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There are two very basic configurations for stable feedback loops: inverting and non-inverting.

The non-inverting version seems more obvious as it’s easier to grasp a positive gain. If V_{i} increases, so does V_{o}.

Above is only one-step beyond the unity-gain arrangement of the previous post. Since we haven’t quite reached the real world yet, we can make some temporary assumptions to approximate what happens:

I_{feedback} being the current flowing from the output terminal to the node on pin 3 and ultimately-no current flows into pin 3-to ground. A little elementary circuit analysis gives:

So despite its operation being intuitively obvious, the gain has an extra one in it. This means no matter how big we make R_{1}, there will always be a minimum of 0dB gain:

If looking for a 10:1 gain, the ratio of R_{2}:R_{1} must be 9:1.

The next basic configuration is inverting, so called because the voltage from input to output is inverted:This looks almost identical to the non-inverting configuration, except that pin 3 is grounded, and pin 4 becomes, for the purpose of this exercise, a virtual ground:

The inversion can be slightly confusing, but the math actually turns out to be easier:

This really is simpler, and has the further advantage of the gain being configurable to less than 0dB. This is of importance in filter design, as being able to apply a gain of less than unity means attenuation is possible. In contrast, the non-inverting case will always have a unity-gain pass through, so filtering out unwanted frequencies becomes quite a challenge.

Phase can be a little confusing because it means more than one thing. Invariably it refers to repetitive signals, usually sine waves, being pushed through circuits; after that, attention must be paid to which thing is being examined.

In impedance calculations it means the difference between the voltage and current across/through a load, a comparison of apples to oranges. Since impedance is by definition voltage divided by current: …where ω is frequency in radians/sec rather than cycles/sec, so ω = 2πf.

If voltage leads current, impedance phase is leading; the opposite, that voltage lags current means impedance phase is lagging, is also true. For example in the plot at left, the current (violet) is a little ahead of the voltage (blue), so voltage lags current; alternatively the current (red) is a little behind the voltage (blue), so voltage leads current.

Impedance phase maps as follows: inductive = leading; capacitive = lagging; resistive = neutral. Purely reactive loads don’t pull voltage out of phase with current by more than ±90°. These phase shifts contribute to the stability in an amplifier.

*Inversion vs. Phase*

*In the inverting amplifier discussed above there appears to be a phase difference of 180°, but this is incorrect. A phase delay of 180° should put the positive peak at the output one half cycle after the input, but this isn’t what’s happening.*

*The signal is being multiplied by -1, so that positive peak is now a negative peak, and is not delayed at all.*

In circuits with op-amps configured with closed-loop feedback, it’s normally thought of as the phase difference between the voltage at the output vs. the voltage at the input to the whole circuit, resistors and all…or more precisely, impedances and all. So it’s the phase of V_{i} minus the phase of V_{o}. Note the difference from impedance phase: in this case it’s the phase difference between two voltages, not between a voltage and a current. Adding reactive components to the feedback loop or input path will introduce phase shift, not to be confused with gain inversion.

This is the phase to which attention and respect must be paid. Take the voltage difference between the non-inverting and inverting inputs, ΔV = V_{+} – V_{–}, and compare that signal with the voltage at the output pin of the amplifier. The phase relationship between ΔV and V_{o} is critical to stability.

In the previous post, we showed how the amplifier’s output represents the difference between its non-inverting and inverting pins multiplied by its gain. When feeding the amplifier’s output back to its input, its output will converge on the voltage required to minimize the difference between the inputs. The amplifier’s output waveform will lag behind what’s happening on its inputs; it takes a finite amount of time for the transistors inside the amplifier to respond to changes on the input pins.

In the gain calculations above, the little white lie was told that the voltages at the two inputs were equal. They’re not. There is a measurable phase difference between ΔV and V_{o}. Using the inverting circuit discussed above, hang a scope probe on the inverting input and compare it to the output. Not only is this tiny difference visible, the more trouble the amplifier is having keeping stable, the greater the amplitude of ΔV. If an amplifier is operating at a low enough frequency there will be no visible phase shift from ΔV to V_{o}, and the peak voltage on ΔV may not be measurable. As frequency increases, and with it shifts the amplifier’s phase lag, ΔV will grow.

If this phase difference reaches 180°, when the amplifier tries to raise its voltage to compensate for a positive difference between its inputs, it’s doing the exact opposite of what’s required for stability: driving the inputs further apart, instead of closer together. If gain is greater than unity at a frequency with 180° phase difference, the amplifier will oscillate. Even if no signal is put into it, just a little noise will feed through the amplifier and come out bigger than it started, and the signal will grow.

The amount of delay from input to output depends on the bandwidth of the amplifier. Using a Microchip MCP6441 as an example, over most of its bandwidth the phase delay will be between 0° and 90°. Somewhere near the upper limit of frequency at unity gain, the phase will begin to lag by more than 90° (see figure above/left for a time-domain representation). In the parlance of poles and zeros, there’s a pole at around 0.03Hz, and an additional pole at around 10KHz, just above the gain bandwidth product. A plot of this relationship (see Figure 2-15 in the Microchip datasheet) is as follows:

Note that the phase curve is beginning to flatten asymptotically towards the 180° line. There should be a corresponding change in slope of the open-loop gain (blue line) where phase reaches 135°. With the phase change should come a doubling of the rate of attenuation from 20dB/decade to 40dB/decade.

The phase does not reach 180° before amplifier gain drops below 0dB, so it’s reasonably stable. At frequencies from 1Hz to 1KHz, the phase angle is 90°, so the amplifier is a little out of step keeping the output matched up to what’s happening on its inputs. Above 1KHz, the amplifier’s phase lag begins increasing, and above about 20KHz, approaches the unwelcome 180°. Fortunately, gain is under 0dB by 10KHz, so this instability is not able to cause oscillations.

This is a common term in control systems and means the difference in phase from the dreaded 180°. An amplifier with 30° phase shift has a phase margin of 150°. In the above diagram, frequencies near 10KHz are shifted in phase by close to 120°, phase margin is thus 60° and decreasing with increasing frequency; the amplifier will behave underdamped at higher frequencies, and may show ringing (low amplitude high frequency sine wave superimposed on the output during some or all of the sinusuoidal wave); call it sloppy & loose.

Next post: let’s break it. How hard is it to push an amplifier into oscillations?

]]>This is one of those weird areas of where explaining one thing requires explaining several others; they all must be understood collectively.

So what is meant by loop? If it’s open, can it be closed? Yup. In most amplifier circuits there is an impedance connected from the output to the inverting input; it’s used to reduce over-all gain. This is a negative (stable) feedback loop…closed-loop. If there’s no connection…open-loop. To diverge briefly, there are configurations where a positive (unstable) feedback loop is made, and others called multiple-feedback where the output has a path to both inverting and non-inverting inputs.

We’ll stick to the simplest case for now. Open-loop gain (i.e. no feedback connection) means the amount of gain applied to the difference in voltage between the non-inverting and inverting terminals of the amplifier, appearing at the output terminal.

If working with voltage gain, do this:Op-amps deliver voltage gain (usually). dB is still a ratio of power, proportional to the square of the voltage ratio, so an extra 2 pops out.

Typically a small-signal amplifier will have an open-loop gain of 100 to 140 dB. This is quite high; although it can be thought of as infinite, be weary of excessive gain. Open Loop Gain is sometimes called by other names. In TI’s case, they seem to like calling it Large-Signal-Differential-Voltage-Amplification (A_{vs}); for a TL071, it’s 200 V/mV. Hey wait a minute, you ask, isn’t this parameter supposed to be unitless? Yes. It’s a gain factor. Since it’s specified in V/mV, multiply it by 1,000 to make it unitless: A_{vs}= 200,000 (!) or roughly 106dB, right where it was expected. This can be thought of as infinite, but there is a gremlin waiting to pull the rug out from under you…

Time for a reality check. That 106 dB of gain discussed above is fantastic but there’s a problem. This is the source of not-so-flat gain across the amplifier’s limited frequency of operation, and is also a potential source of some troublesome oscillations. They’re nasty, and can kill your amplifier with much less flare than exceeding the thermal dissipation limit of the device.

Gain Bandwidth Product, or GBP, is the product of open-loop gain and frequency being amplified. In an op-amp it is not a constant for all frequencies, but is a constant over much of the range specified by the manufacturer. The higher the gain, the lower the maximum frequency the op-amp can amplify without bumping into its own open-loop gain limit.

Below is a plot showing the gain performance of a Microchip MCP6441 op-amp (Figure 2-15 of the datasheet). Gain is exceptionally high for frequencies up to 0.01Hz, but somewhere around 0.05Hz, it has visibly begun to diminish. The useful bandwidth, assuming consistent gain over some range of frequency is desired, is the horizontal part of the curve.

An amplifier that attenuates frequencies above 0.05Hz? What good is that? It depends on the bandwidth of the signal being amplified. Some sensors measure phenomena that change very slowly; ambient light or temperature over the course of a 24 hour period would be good examples. There are very few signals (none?) that require 100dB or more of amplification and have a bandwidth of less than 0.01Hz; using an amplifier in an open-loop configuration is impractical.

If a signal path is made between the output and the inverting input terminal of the op-amp, this is called negative feedback, or closed loop. Perhaps the easiest to understand version of this is a non-inverting configuration:

So what does this do? The output is fed back to the inverting terminal, and the amplifier will apply a lot of gain to the difference between pins 3 & 4. If the voltage at pin 3 is 0V, what’s the voltage at pin 1? If the voltage at pin 4 happens to be greater than that at pin 3, the difference between pins 3 & 4 will be negative, but the amplifier will amplify this to a large negative voltage, pushing pin 4’s voltage below pin 3’s, but then the difference between the two pins is positive, so the voltage at pin 1 will be positive and greater than the voltage at pin 3, pushing pin 4’s voltage up and creating a negative difference. It should be pretty obvious that the amplifier’s output voltage will converge on the voltage at pin 3. Extending this, whatever voltage appears on V_{i} will appear on V_{o}. So now we have no gain at all! V_{o} = V_{i}, and gain is 1:1, or 0dB. It’s called a unity gain buffer.

On first glance, it looks not that useful. If the voltage connected to V_{i} is a sensor with high impedance of its own, it cannot drive anything, but the unity gain buffer’s output can, as V_{o} has the same voltage but low source impedance. This is a little pedestrian, and the greater point is, gain is reduced to 0dB; that curve above showing the gain rolling off at 20dB/decade is no longer the amplifier’s behaviour. Draw a straight line at 0dB on the curve, and it looks like the amplifier will dutifully reproduce whatever appears at pin 3 on pin 1, so long as the frequency is below about 9KHz; page 1 of the datasheet for this part shows GBP for this amplifier is in fact, 9KHz. Below is the same plot as above, but with the unity gain curve added. With the closed loop connection, the amplifier will follow the red line.

So a little better performance in terms of amplifying frequencies, but other than reproducing a potentially sensitive signal with the authority to drive an ADC input or another amplifier stage, it isn’t doing much. Adjusting the gain between 0dB and 110dB, trades frequency for gain; more gain is seen as the red curve sliding up the vertical axis, but bounded by the blue curve at all times: more gain = lower frequency limit.

Next time around: phase, inverting and non inverting feedback configurations.

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